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Improved Three-Phase Micro-Inverter Using
Dynamic Dead Time Optimization and PhaseSkipping Control Techniques
Abstract:
This paper introduces two efficiency improvement techniques for a grid-tied
micro-inverter with current mode control zero voltage switching (ZVS)
output stages. The first technique is dynamic dead time optimization
wherein PWM dead times are dynamically adjusted as a function of load
current. The second method is advanced phase-skipping control which
distributes power on individual phases depending on the available input
power from PV source. Neither of the techniques require any additional
components and both can be easily implemented in the digital controller
firmware. The two techniques were designed and implemented in a 400W
three phase micro-inverter prototype and the experimental results confirm
practical implementation of these techniques and demonstrate that
significant efficiency improvement can be achieved.
Existing system:
 Micro-inverters with typical power levels from 200 to 400W are widely used
in photovoltaic (PV) system architectures due to improved energy
harvesting, high reliability and simple installation.
 Employing high switching frequency and soft switching techniques reduces
cost by shrinking the size of passive components and improves efficiency by
reducing switching losses. Soft switching can be improved by minimizing
MOSFET body diode conduction time.
Proposed system:
 In this paper, two control techniques are introduced both of which improve
efficiency in three-phase inverters and micro inverters. The first technique is
dynamic dead time optimization wherein PWM dead times are dynamically
adjusted as a function of load current.
 The PWM dead times are calculated by sensing the grid voltage which is
also used for duty cycle calculation. The second method is advanced phaseskipping control which distributes power on individual phases depending on
the available input power from PV source.
 Neither of the techniques require any additional components and both can be
easily implemented in the digital controller firmware.
Circuit diagram:
Reference:
[1] H.W. Huang, C. Y. Hsieh, K. H. Chen, and S. Y. Kuo, “Load dependent
dead-times controller based on minimized duty cycle technique for DCDC
buck converters,” in Proc. PESC Record – IEEE Annual Power
Electron. Spec. Conf., pp. 2037–2041, 2007.
[2] P. T. Krein and R. M. Bass, “Autonomous control technique for
highperformance
switches,” IEEE Trans. Ind. Electron., vol. 39, no. 3, pp.
215–222, Jun. 1992.
[3] W. L. W. Lau and S. Sanders, “An integrated controller for a high
frequency buck converter,” in Proc. PESC '97 Record. 28th Annual
IEEE Power Electron. Spec. Conf., vol. 1, 1997.
[4] B. Acker, C. Sullivan, and S. Sanders, “Synchronous rectification with
adaptive timing control,” in Proc. PESC '95 Record. 26th Annual IEEE
Power Electron. Spec. Conf., vol. 1, 1995.