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Midterm 1
1. An equivalent representation for the Boolean expression A’+1 is
a. A
b. A’ c. 1
d. 0
2. For a three input (A, B, C) OR gate, which inputs are needed if output=0?
a. A=0, B=0, C=1 b. A=0, B=1, C=0 c. A=1, B=1, C=1 d. A=0, B=0, C=0
3. The Hamming distance of the following codes:
0000011110001111
0001011010011110
a. 1
b. 2
c. 3
d. 4
4. Which of the following expressions is not equivalent to x?
a. x NAND x
b. x NOR x
c. x NAND 1
d. x NOR 1
5. In Boolean algebra
A+(B.C)=
a. A.B+C
b. A.B+A.C
c. A
d. (A+B).(A+C)
6. The expression NOT (W+Y).(X+Z) is equivalent to:
a. (X + Z).(W + Y)
b. (W+X) (W+Z)
c. (W.Y) + (X.Z)
d. (W + X).(Y + Z)
7. Identify that function generated by the logic circuit shown.
1. F = AB + C + D
2. F = (A’+B’)C’D
3. F = A’B’+C’+D’
4. F = (A+B)CD
5. None of the above
Midterm 2
1. Which step in this reduction process is using DeMorgan’s theorem?
a. Step 1
b. Step 2
c. Step 3
d. Step 4
2. The solution to a digital design is specified by the following Karnaugh Map:
CD
00
01 11 10
AB 00 0
0
0
0
A+B
01 1
1
1
1
1
11 0
1
0
A’+D
10 0
1
1
0
The implementation of this Karnaugh Map will be which one of the following Boolean equations?
a. (A+B).(A+D) b. A.B + A.D c. (A+B).(A+D) d. A.B + A.D
3. Given the following implementation using a 3x8 decoder with negated outputs, what is the
function F(A,B,C)?
a. 0
A
0
0
1
c. A’.C + B’.C d. C’ + A.B e. C
F
=(A’B’C)’ + (A’BC)’ + (AB’C)’
=A + B + C’ + A + B’ + C’ + A’ + B + C’
1
=A + A’ + B + B’ + C’
1
= 1 + 1 + C’
1
= 1
4. When the CPU needs a certain data and it is not loaded in the memory cache and the CPU needs
to load this data directly from RAM we say that there was a:
a. Transmission delay b. Rotational delay c. Cache hit
d. Cache miss
e. none of the above
B
0
1
0
b. 1
C
1
1
1
5. Which of the follow is the correct graphic notation for a positive-edge-triggered D flip-flop?
D Q
0
0
1
1
a.
b.
c.
d.
6. Which of the follow is the state diagram of a T flip-flop?
T
0
a.
b.
1
c.
d.
Q
Q
Q
Midterm 2 Make-up
1. The number of digits in Hexadecimal system is
a. 15 b. 17 c. 16 d. 8
2. Which one of these groups are in proper smallest to largest in memory order?
a. RAM | L2 Cache | L1 Cache b. L2 Cache | RAM | L1 Cache
c. L1 Cache | L2 Cache | RAM d. L2 Cache | L1 Cache | RAM
3. If two items are close to each other in memory, then they exhibit ________.
a. temporal locality
b. spatial locality
c. all of the above
d. none of the above
4. Which of the following allows a block to be placed anywhere in the cache?
a. Direct Mapped
b. Set Associative
c. Fully Associative
d. N-Way Set Associative
5. A 3-line to 8-line decoder is connected as shown. Where x, y and z are inputs (z is the least
significant input digit) and F is an output. Which of the following expressions correctly describe F?
x
y
z
F
0
1
1
1
1
1
1
1
((x’yz)’(xyz)’)’ = (x’yz )+(xyz)
= (yz)+(x’x)
= yz
a. F(x, y, z) = z
e. F(x, y, z) = x’
b. F(x, y, z) = x
c. F(x, y, z) = z’
d. F(x, y, z) = yz
Midterm 3
1. In a JK flip flop toggle means
a. set Q=1 and Q’=0
b. set Q=0 and Q’=1
c. change the output to the opposite state
d. no change in input
2. CISC machines
a. have fewer instruction than RISC machines
c. have medium click speed
b. use more RAM than RISC machines
d. use variable size instructions
3. Pipelining improve CPU performance due to
a. reduced memory access time
c. the introduction of parallelism
b. increased clock speed
d. additional functional unit
4. Cache memory refers to
a. cheap memory that can be plugged into the mother board to expand main memory
b. fast memory present on the processor chip that is used to store recently accessed data
c. a reserved portion of main memory used to save important data
d. a special area of memory on the chip that is used to save frequently used constants
5. In a four variable Karnaugh map eight adjacent cells give a
a. two variable term
b. single variable term
c. three variable term
d. four variable term
EX:
AB
CD
00
01
11
10
00
01
11
10
Result = C’
Quiz 1 ~ 3
No multiple Choice
Quiz 4
1. Given the following implementation using a 4:1 multiplexer, what is the function L(A, B, C, D)?
a. m(0, 1, 2, 3)
0 = 00
1 = 01
b. m(5, 6, 8, 11)
2 = 10
c. m(1, 2, 5, 6)
3 = 11
d. m(1, 2, 5, 6, 9, 10, 13, 14)
e. m(2, 5, 9, 14)
Fill the following table
A
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
B
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
L
0
0
1
0
0
1
0
0
0
1
0
0
0
0
1
0
Quiz 5
1. Inside a computer processor, what is the function of the ALU?
a. stores data
b. executes instructions such as “add”
c. stores the address in memory of the current instruction
d. communicates with peripherals
2. RAM is described as memory that is:
a. Temporarily stored data or program.
b. Retained even after the computer is shut off.
c. Permanently stored instructions.
d. Controlled by the storage unit.
3. Arithmetic operations are actually executed in:
a. Control Unit
b. L1 cache
c. the ALU
d. RAM
Quiz 6, 7
No multiple Choice
Quiz 8
1. Which parts of the computer perform arithmetic calculations?
a. ALU b. Registers c. Logic bus d. none of above
2. Why didn’t RISC machines appear before the early 1980s?
a. Nobody thought of them until then.
b. Until then you couldn’t fit enough transistors on a chip to build a pipelined machine.
c. That’s when IBM’s patent on pipelining expired.
d. That’s when the gap between processor and memory speeds reached the point at which
pipelining became profitable.
3. Pipelining improve CPU performance due to
a. reduced memory access time
c. the introduction of parallelism
b. increased clock speed
d. additional functional unit
4. CISC machines
a. have fewer instruction than RISC machines
c. have medium clock speed
b. use more RAM than RISC machines
d. use variable size instructions
Quiz 9
No multiple Choice