Download PURPOSE AND BACKGROUND

UNIVERSITI MALAYSIA PERLIS
EMT 111/4
ELECTRONIC DEVICES
EXPERIMENT 6
VOLTAGE DIVIDER BIASING
NAME
: ______________________________
MATRIC NO.
: ______________________________
PROGRAMME :______________________________
DATE
:____________________________
MARKS
RESULT &
CALCULATION
GRAPH
D
C
Total
Marks
26
10
8
5
49
100%
Electronic Devices (EMT 111) Sem 1 08/09
Laboratory Module
Exp.6
EXPERIMENT 6
Voltage Divider Biasing
1.
OBJECTIVE
1.1
1.2
2.
To analyze the voltage-divider bias circuit
To construct the dc load line
INTRODUCTION
The advantage of using voltage divider bias is that the base current is made
small compared to the currents through the two base (“voltage divider”) resistors.
With this property, transistor beta changes will no longer affect the base voltage
and the collector current.
2.1
Quiescent dc base voltage
VB
2.2
2.7
VB - VBE
(6.2)

VE
( IC  IE for large  )
RE
(6.3)
=
VCC - ICRC
(6.4)
Quiescent dc collector to emitter voltage
VCE
2.6
=
Quiescent collector voltage
VC
2.5
(6.1)
Quiescent dc collector (emitter) current
IC
2.4
 R2 

VCC
 R1  R2 
Quiescent dc emitter voltage
VE
2.3


VCC – IC( RC + RE)
=
VC – VE
(6.5)
Dc load line
IC(sat)

VCE(off)
=
VCC
(saturation)
RC  RE
VCC (cutoff)
(6.6)
(6.7)
In general, make :
R1 || R2  RE
(6.8)
-2-
Electronic Devices (EMT 111) Sem 1 08/09
3.
Laboratory Module
Exp.6
COMPONENT AND EQUIPMENT
3.1 Resistors:
3.1.1 Two 1 kΩ
3.1.2 4.7 kΩ
3.1.3 10 kΩ
3.2 10 kΩ potentiometer
3.3 2N3904 NPN silicon transistors
3.4 0-15V dc power supply
3.5 Multimeter
4.
PROCEDURE
4.1
Determination of VB, VE, VC and VCE:
Figure 6.1 Schematic diagram of circuit
4.1.1
4.1.2
Figure 6.2 2N3904 pin diagram
Calculate the expected values of the quiescent dc base voltage
(VB), emitter voltage (VE), collector voltage (VC), and collector
emitter voltage (VCE) using typical value for the base-emitter voltage
of a silicon transistor (0.7V).
Record these values.
-3-
Electronic Devices (EMT 111) Sem 1 08/09
4.2
Laboratory Module
Exp.6
Measuring of VB, VC, VE,VCE and IC using multimeter:
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
Construct the voltage divider bias circuit shown in Figure 6.1.
Take your multimeter and measure VB, VC, VE and VCE.
Record your results and make comparison between these
measured values with the expected voltages determined before.
Now measure the quiescent collector current and compare this
value with the expected value (Equation 6.3).
Record this value.
(NOTE: Your results should agree within 10%)
4.3
Determination of DC Load Line:
4.3.1
4.3.2
4.3.3
4.3.4
Calculate the saturation and cutoff points using the equations 6.6 &
6.7.
Record these values.
Then, plot the dc load line, using the calculated values of IC(sat) and
VCE(off) as the endpoints of the load line.
On the same graph, plot the Q point based on the measured values
of IC and VCE.
(NOTE: You should find that the measured Q point lies essentially on the dc
load line)
4.4
Measuring voltage and current in ‘cutoff’ condition:
4.4.1
4.4.2
By using the same transistor, disconnect power from the
breadboard.
Replace resistors R1 and R2 with a 10 kΩ potentiometer as shown in
Figure 6.3.
Figure 6.3
Schematic diagram from Step 5
-4-
Electronic Devices (EMT 111) Sem 1 08/09
4.4.3
4.4.4
4.4.5
4.4.6
4.4.7
4.5
Laboratory Module
Exp.6
Now, connect the power to the breadboard.
Connect a multimeter between the transistor’s collector and emitter
terminals.
Then, slowly vary the 10 kΩ potentiometer until VCE as read by the
multimeter reaches a maximum value, VCE(OFF).
Then measure the corresponding collector current, IC(OFF).
Record both values.
Measuring voltage and current in ‘saturation’ condition:
4.5.1
Carefully vary the resistance of the 10 kΩ potentiometer until the
collector current reaches a maximum value while continuing to
measure the transistor’s collector current (IC)
(NOTE: This is the collector saturation current IC(sat). )
4.5.2
4.5.3
Now measure the corresponding collector emitter voltage VCE(sat).
Record the values for both IC(sat) and VCE(sat).
(NOTE: At saturation, VCE(sat) is ideally zero while at cutoff, IC(off) is zero. )
4.5.4
4.6
Now, plot the values for IC and VCE at cutoff and saturation on the
graph constructed in Step 4.3
Measuring IC and VCE over the ‘active region’ of the dc load line:
4.6.1
4.6.2
4.6.3
Now, vary the potentiometer so that you are able to measure about
five combinations of IC and VCE .
Record all values.
Then plot these values on the graph.
-5-
Electronic Devices (EMT 111) Sem 1 08/09
Name
Laboratory Module
Exp.6
: ______________________________
Matric No.:______________________________
5.
Date : ______________
Course : ______________
RESULT
4.1
Determination of VB, VE, VC and VCE and IC:
(5M)
4.2 Measuring of VB, VC, VE,VCE and IC using multimeter:
(5M)
-6-
Electronic Devices (EMT 111) Sem 1 08/09
Name
Laboratory Module
Exp.6
: ______________________________
Matric No.:______________________________
Date : ______________
Course : ______________
4.3 Determination of DC Load Line.
(2M)
4.4 Measuring voltage and current in ‘cutoff’ condition.
(2M)
4.5 Measuring voltage and current in ‘saturation’ condition.
(2M)
4.6 Measuring IC and VCE over the ‘active region’ of the dc load line.
(10M)
-7-
Electronic Devices (EMT 111) Sem 1 08/09
Name
Laboratory Module
Exp.6
: ______________________________
Matric No.:______________________________
6.
Date : ______________
Course : ______________
DISCUSSION
1.
What are advantages of voltage-divider bias?
(4M)
2.
Explain why the emitter bias more stable than base bias.
(4M)
-8-
Electronic Devices (EMT 111) Sem 1 08/09
Name
Laboratory Module
Exp.6
: ______________________________
Matric No.:______________________________
7.
Date : ______________
Course : ______________
CONCLUSION
Based on the DC load line graph that you have plot, make your conclusion (your
answer should be in a simple note).
(5M)
-9-