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The IEEE 1451.4 Standard for Smart Transducers
The IEEE 1451.4 Standard for Smart Transducers

A Compact Class-AB CMOS Variable Gain Amplifier
A Compact Class-AB CMOS Variable Gain Amplifier

... generally required to maintain high linearity and low noise over the entire bandwidth and gain range. It is also important that the bandwidth of the amplifier remains constant when the voltage gain is varied and this can be obtained by employing current-mode techniques [5]. In portable communication ...
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CD4514BC* CD4515BC 4-Bit Latched/4-to-16
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... INA–IND, the information on the inhibit line can be transferred to the addressed output line to the desired output registers, A–P. This distribution of data bits to the output registers can be made in many complex patterns. For example, all of the most significant bits from the input registers can b ...
NVIDIA SDR (Software Defined Radio) Technology The modem
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... GFLOPS/s. The NVIDIA i500 soft-modem architecture is built around the NVIDIA Deep eXecution® Processor (DXP) to deliver the performance requirements of high speed LTE connectivity while consuming the least amount of power. The DXP is a new class of asymmetric microprocessor that is built from the gr ...
ADS809 analog-to-digital converter with large input pulse signal
ADS809 analog-to-digital converter with large input pulse signal

... all 0s. When the input voltage is 0 (at the middle of the FSR) or only the common-mode voltage, the ADS809 outputs 100000000000 (digital value = 2048). The ADS809 will output data from 0 to 4095 when the input voltage is from –FS to +FS – LSB. The ADS809 will output 4095 when the input voltage is ab ...
NB7VQ14M 1.8V/2.5V/3.3V 8GHz / 14Gbps Differential 1:4 Clock / Data CML Fanout
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... ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any partic ...
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... All voltages are referenced to ground. Applies to A0, SDA, SCL for the DS3904 and A0, A1, A2, SDA, SCL for the DS3905. Also applies to H0, H1, H2 for both DS3904 and DS3905 when in the high-impedance state. Note 3: ISTBY specified with SDA = SCL = VCC and A0 = GND. Note 4: Absolute linearity is used ...
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CC1010 Data Sheet

... Frequency bands: 300-348MHz, 400464MHz and 800-928MHz High sensitivity (–110dBm at 1.2kbps, 1% packet error rate) Programmable data rate up to 500kbps Low current consumption (15.6mA in RX, 2.4kbps, 433MHz) Programmable output power up to +10dBm for all supported frequencies Excellent receiver selec ...
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... control is given over the gain of the amplifier and the lower frequency limit of the filter, using an external resistor and capacitor. (The ESD protection resistor noted above can be used to set amplifier gain, hence requiring only one component for both functions.) The higher frequency limit of the ...
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... This control optimizes the input signal level before the tube gain is applied. Both Microphone and Instrument input gains remain the same and are affected by this adjustment. Input gain can be adjusted from 0dB (for line level signals) to 40dB of gain. The analog meters are used to see the effects o ...
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... A battery fuel gauge circuit board is a challenging environment due to the fundamental incompatibility of high-current traces and ultra-low current semiconductor devices. The best way to protect against unwanted trace-to-trace coupling is with a component placement such as that shown in Figure 11, w ...
A Robust, Fast Pulsed Flip-Flop Design
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... • Want to design a flip-flop with a goal of minimizing the figure of merit Tcq + Tsu • We explored different circuit designs with this goal in mind, while ensuring that the resulting flip-flop achieves – Low power and area – High speed – Robustness to PVT variations ...
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... 3. Forest K. Harries,“Electrical Measurement”,Willey Eastern Pvt. Ltd. India . 4. M.B. Stout ,“Basic Electrical Measurement” Prentice hall of India,India. 5. W.D.Cooper,” Electronic Instrument & Measurement Technique “ Prentice Hall International. 6. Rajendra Prashad ,“Electrical Measurement &Measur ...
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... (b) Calculate the average power of the QPSK signal given d. (c) Write the probability of symbol error for 4-PAM and 4-QAM as functions of the signal-tonoise ratio (SNR). Superimposed on the same plot, plot the probability of symbol error for 4PAM and 4-QAM as a function of SNR. For the horizontal ax ...
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... to develop designs below the 50nm technology point [26]. Indeed power/energy consumption has already started to dominate execution time as the critical metric in system design. This holds not just for mobile systems due to battery life considerations, but also for server and desktop systems due to e ...
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... voltage of one DG unit is less than its allowed lower limit, it will ask for having the priority to trigger a synchronization event at once. Until the constraint which two consecutive synchronization events is greater than a permissible minimum value is satisfied, the DG unit with the priority will ...
MAX5251 +3V, Quad, 10-Bit Voltage-Output DAC with Serial Interface __________________General Description
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... reference inputs are driven from the same source, the effective minimum impedance is 5kΩ. Driving the REFAB and REFCD pins separately improves reference accuracy. In shutdown mode, the MAX5251’s REFAB and REFCD inputs enter a high-impedance state with a typical input leakage current of 0.01µA. The r ...
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... B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generato ...
Resistivity and Conductivity
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... both transistors are turned on by logic 1 inputs. If either input is a logic 0 that transistor cannot conduct, so there is no current through either one. The output is then a logic 1. This is the behavior of a NAND gate. Of course, an inverter can also be included to provide an AND output at the sam ...
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... RS-485/RS-422 Data Interfaces The MAX3480EA/MAX3480EB are electrically isolated RS-485/RS-422 data-communications interfaces. The RS-485/RS-422 I/O pins are protected against ±15kV electrostatic discharge (ESD) shocks, without latchup. Transceivers, optocouplers, and a transformer are all included i ...
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Immunity-aware programming

When writing firmware for an embedded system, immunity-aware programming refers to programming techniques which improve the tolerance of transient errors in the program counter or other modules of a program that would otherwise lead to failure. Transient errors are typically caused by single event upsets, insufficient power, or by strong electromagnetic signals transmitted by some other ""source"" device.Immunity-aware programming is an example of defensive programming and EMC-aware programming. Although most of these techniques apply to the software in the ""victim"" device to make it more reliable, a few of these techniques apply to software in the ""source"" device to make it emit less unwanted noise.
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