™ High-Performance, Bipolar-Input AUDIO OPERATIONAL AMPLIFIERS OPA1602
... these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 17 of the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10mA or less ...
... these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 17 of the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10mA or less ...
Genius Current-source Analog Output Blocks datasheet, GFK
... For additional information about systems and communications, including bus specifications, refer to the I/O System and Communications Manual. ...
... For additional information about systems and communications, including bus specifications, refer to the I/O System and Communications Manual. ...
DRV8833 Dual H-Bridge Motor Driver (Rev. D)
... Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. All inputs are ignored until nSLEEP returns inactive high. When returning from slee ...
... Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. All inputs are ignored until nSLEEP returns inactive high. When returning from slee ...
MAX4951C 6Gbps SATA Bidirectional Redriver with Input Equalization, General Description
... features an independent channel dynamic power-down mode where power consumption is reduced when no input signal is present. The device maintains output common-mode levels to meet internal SATA version 3.0 standards and prevent delays when coming out of lowpower mode. The device preserves signal inte ...
... features an independent channel dynamic power-down mode where power consumption is reduced when no input signal is present. The device maintains output common-mode levels to meet internal SATA version 3.0 standards and prevent delays when coming out of lowpower mode. The device preserves signal inte ...
TPS61054 数据资料 dataSheet 下载
... synchronous-boost topology with constant current sink to drive single white LEDs. The device uses an inductive fixed-frequency PWM control scheme using small external components, minimizing input ripple current. The 2-MHz switching frequency allows the use of small and low-profile 2.2-µH inductors. ...
... synchronous-boost topology with constant current sink to drive single white LEDs. The device uses an inductive fixed-frequency PWM control scheme using small external components, minimizing input ripple current. The 2-MHz switching frequency allows the use of small and low-profile 2.2-µH inductors. ...
PDF - This Chapter
... inoperable. If you are using DC-power supplies, the most common practice is to have both DC inputs connected. ...
... inoperable. If you are using DC-power supplies, the most common practice is to have both DC inputs connected. ...
T401 - T402 Operating Instructions 383E-64618
... For the two limits on the frequency relay the switch-on point (= Limit high) and the switch-off point (= Limit low) can be entered separately, thus allowing for the realisation of practically any hysteresis: With the binary input connected to 0V (=low) relay control parameter set „B“ is active. With ...
... For the two limits on the frequency relay the switch-on point (= Limit high) and the switch-off point (= Limit low) can be entered separately, thus allowing for the realisation of practically any hysteresis: With the binary input connected to 0V (=low) relay control parameter set „B“ is active. With ...
How Ground Fault Protection Works
... found throughout the house It fits into the standard outlet box and protects you against "ground faults" whenever an electrical product is plugged into the outlet. Most receptacle-type GFCls can be installed so that they also protect other electrical outlets further "down stream" in the branch circu ...
... found throughout the house It fits into the standard outlet box and protects you against "ground faults" whenever an electrical product is plugged into the outlet. Most receptacle-type GFCls can be installed so that they also protect other electrical outlets further "down stream" in the branch circu ...
Avoid generating capacity losses in aging hydropower plants
... to a potentially expensive problem while dramatically enhancing equipment reliability and personnel safety by increasing protection against harmful and damaging ground fault events. Customized units can be engineered to help manage the transient overvoltages that result from arcing ground faults. Wh ...
... to a potentially expensive problem while dramatically enhancing equipment reliability and personnel safety by increasing protection against harmful and damaging ground fault events. Customized units can be engineered to help manage the transient overvoltages that result from arcing ground faults. Wh ...
Aalborg Universitet Control of Grid Converters
... benefit the efficiency of both grid and generator converters due to reduced switching losses [4]. Also for some applications that converter are installed at high altitude, the effect of reduced energy stored in dc-link improves the reliability by decreasing the failure rate based on cosmic rays [5]. ...
... benefit the efficiency of both grid and generator converters due to reduced switching losses [4]. Also for some applications that converter are installed at high altitude, the effect of reduced energy stored in dc-link improves the reliability by decreasing the failure rate based on cosmic rays [5]. ...
PTN3381D - NXP Semiconductors
... OE_N can be used to turn off the TMDS inputs and outputs, thereby minimizing power consumption. The TMDS outputs are back-power safe to disallow current flow from a powered sink while the PTN3381D is unpowered. The PTN3381D’s DDC channel provides active level shifting and buffering, allowing 3.3 V s ...
... OE_N can be used to turn off the TMDS inputs and outputs, thereby minimizing power consumption. The TMDS outputs are back-power safe to disallow current flow from a powered sink while the PTN3381D is unpowered. The PTN3381D’s DDC channel provides active level shifting and buffering, allowing 3.3 V s ...
Logic and Fault Modeling - University of Connecticut
... Two faults f1 and f2 are equivalent if all tests that detect f1 also detect f2. If faults f1 and f2 are equivalent then the corresponding faulty functions are identical. All single faults of a logic circuit can be divided into disjoint equivalence subsets, where all faults in a subset are mutually e ...
... Two faults f1 and f2 are equivalent if all tests that detect f1 also detect f2. If faults f1 and f2 are equivalent then the corresponding faulty functions are identical. All single faults of a logic circuit can be divided into disjoint equivalence subsets, where all faults in a subset are mutually e ...
Placid HD Guide - Twisted Pear Audio
... amount of power that is used can vary (blue). As one might understand this is not the most efficient use of power, but it does offer a very clear advantage: the output of shunt regulators usually has extremely low amounts of noise. This makes it a favorite choice for audio applications. From a DIY p ...
... amount of power that is used can vary (blue). As one might understand this is not the most efficient use of power, but it does offer a very clear advantage: the output of shunt regulators usually has extremely low amounts of noise. This makes it a favorite choice for audio applications. From a DIY p ...
HI-3000 Rev. F - Holt Integrated Circuits
... transmitter outputs will be disabled, driving the bus lines into the recessive state. The timer is reset by a positive edge on the TXD pin. Note that the minimum TXD dominant time-out time, tdom = 300μs, defines the minimum possible bit rate of 40kbit/s (the CAN protocol specifies a maximum of 11 su ...
... transmitter outputs will be disabled, driving the bus lines into the recessive state. The timer is reset by a positive edge on the TXD pin. Note that the minimum TXD dominant time-out time, tdom = 300μs, defines the minimum possible bit rate of 40kbit/s (the CAN protocol specifies a maximum of 11 su ...
BQ24312 数据资料 dataSheet 下载
... by RDSON of Q1). If the input voltage is greater than VO(REG) (plus the RDSON drop) and less than VOVP, the device acts like a series linear regulator, with the output voltage regulated to VO(REG). If the input voltage rises above VOVP, the output voltage is clamped to VO(REG) for a blanking duratio ...
... by RDSON of Q1). If the input voltage is greater than VO(REG) (plus the RDSON drop) and less than VOVP, the device acts like a series linear regulator, with the output voltage regulated to VO(REG). If the input voltage rises above VOVP, the output voltage is clamped to VO(REG) for a blanking duratio ...
ISL6440 Datasheet
... network intermediate bus DC input supplies into the system supply voltages required for a wide variety of applications. Each output is adjustable down to 0.8V. The two PWMs are synchronized 180o out of phase reducing the RMS input current and ripple voltage. The ISL6440 incorporates several protecti ...
... network intermediate bus DC input supplies into the system supply voltages required for a wide variety of applications. Each output is adjustable down to 0.8V. The two PWMs are synchronized 180o out of phase reducing the RMS input current and ripple voltage. The ISL6440 incorporates several protecti ...
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ECE-Electives[1]
... To learn the architecture and programming of advanced Intel family microprocessors and microcontrollers. OBJECTIVES To introduce the concepts in internal programming model of Intel family of microprocessors. To introduce the programming techniques using MASM, DOS and BIOS function calls. To introduc ...
... To learn the architecture and programming of advanced Intel family microprocessors and microcontrollers. OBJECTIVES To introduce the concepts in internal programming model of Intel family of microprocessors. To introduce the programming techniques using MASM, DOS and BIOS function calls. To introduc ...
AD8698
... rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ...
... rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ...
MAX6457–MAX6460 High-Voltage, Low-Current Voltage Monitors in SOT Packages General Description
... threshold hysteresis, power-good or reset timeout options, and one or two high-voltage open-drain outputs. Two external resistors (three for window detection) set the trip threshold voltages. The MAX6457 is a single voltage monitor for undervoltage or overvoltage detection. A logic-based clear input ...
... threshold hysteresis, power-good or reset timeout options, and one or two high-voltage open-drain outputs. Two external resistors (three for window detection) set the trip threshold voltages. The MAX6457 is a single voltage monitor for undervoltage or overvoltage detection. A logic-based clear input ...
Design Considerations for Avoiding Timing Errors during High
... 1. If the routing distance between the ADC output and FPGA input pins is more, then care must be taken to maintain controlled differential impedance near 100 Ω. The physical length of each trace between the LVDS pairs of ADC outputs and the FPGA inputs should be matched within 5 mm of each other for ...
... 1. If the routing distance between the ADC output and FPGA input pins is more, then care must be taken to maintain controlled differential impedance near 100 Ω. The physical length of each trace between the LVDS pairs of ADC outputs and the FPGA inputs should be matched within 5 mm of each other for ...
Slides
... allows both inputs to be high. In this case, the output switches state or “toggles”. 20 March 2005 ...
... allows both inputs to be high. In this case, the output switches state or “toggles”. 20 March 2005 ...