ZXLD1374
... Operating Junction Temperature Range Gain Setting Ratio for Boost and Buck-Boost Modes ...
... Operating Junction Temperature Range Gain Setting Ratio for Boost and Buck-Boost Modes ...
MAX5306/MAX5307 Low-Power, Low-Glitch, Octal 12-Bit Voltage- Output DACs with Serial Interface General Description
... The MAX5306/MAX5307 are 12-bit, eight-channel, lowpower, voltage-output digital-to-analog converters (DACs) that are easily addressed using a simple 3-wire serial interface. These devices feature eight doublebuffered DACs using a common 16-bit serial to parallel shift register, a power-on reset (POR ...
... The MAX5306/MAX5307 are 12-bit, eight-channel, lowpower, voltage-output digital-to-analog converters (DACs) that are easily addressed using a simple 3-wire serial interface. These devices feature eight doublebuffered DACs using a common 16-bit serial to parallel shift register, a power-on reset (POR ...
MAX509/MAX510 Quad, Serial 8-Bit DACs with Rail-to-Rail Outputs _______________General Description
... 20-pin DIP, SSOP, and SO packages are available. The MAX510 is identical to the MAX509 except it has two reference inputs, each shared by two DACs. The MAX510 is housed in space-saving 16-pin DIP and SO packages. The serial interface is double-buffered: A 12-bit input shift register is followed by f ...
... 20-pin DIP, SSOP, and SO packages are available. The MAX510 is identical to the MAX509 except it has two reference inputs, each shared by two DACs. The MAX510 is housed in space-saving 16-pin DIP and SO packages. The serial interface is double-buffered: A 12-bit input shift register is followed by f ...
manual
... To apply Mesh analysis : Select mesh currents . Write the mesh equation using KVL. Solve the equation to find the mesh currents To apply nodal analysis: Identify & mark the node assign node voltages. Write the kirchoffs current law equations in terms of unknowns .Solve them to find the nod ...
... To apply Mesh analysis : Select mesh currents . Write the mesh equation using KVL. Solve the equation to find the mesh currents To apply nodal analysis: Identify & mark the node assign node voltages. Write the kirchoffs current law equations in terms of unknowns .Solve them to find the nod ...
BDTIC ICE3B0365J-T CoolSET -F3
... The Undervoltage Lockout monitors the external supply voltage VVCC . When the SMPS is plugged to the main line the internal Startup Cell is biased and starts to charge the external capacitor CVCC which is connected to the VCC pin. The VCC charge current that is provided by the Startup Cell from the ...
... The Undervoltage Lockout monitors the external supply voltage VVCC . When the SMPS is plugged to the main line the internal Startup Cell is biased and starts to charge the external capacitor CVCC which is connected to the VCC pin. The VCC charge current that is provided by the Startup Cell from the ...
CMOS Phase-Locked-Loop Applications (Rev. B)
... 5 PC1 Average Output Voltage as a Function of Input Phase Difference . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Typical Waveforms for PLL With PC1 Loop Locked at fo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 PC2 Average Output Voltage as a Function of I ...
... 5 PC1 Average Output Voltage as a Function of Input Phase Difference . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Typical Waveforms for PLL With PC1 Loop Locked at fo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 PC2 Average Output Voltage as a Function of I ...
AN10436 TDA8932B/33(B) Class-D audio amplifier Rev. 01 — 12 December 2007 Application note
... The TDA8933(B) device is the low-power version that delivers an output power of 2 × 5 WRMS to 2 × 15 WRMS in a SE configuration or 10 WRMS to 30 WRMS in a BTL configuration. This high efficiency SMA device has been designed to operate without a heat sink and has the flexibility to operate from eithe ...
... The TDA8933(B) device is the low-power version that delivers an output power of 2 × 5 WRMS to 2 × 15 WRMS in a SE configuration or 10 WRMS to 30 WRMS in a BTL configuration. This high efficiency SMA device has been designed to operate without a heat sink and has the flexibility to operate from eithe ...
DAC8550/51/52 EVM (Rev. A
... EVM and the host board may occur. The test point TP1 and J4-20 are provided to allow the user to connect to another external reference source if the onboard reference circuit is not desired. The external voltage reference should not exceed the applied power supply, VDD, of the DAC under test. The RE ...
... EVM and the host board may occur. The test point TP1 and J4-20 are provided to allow the user to connect to another external reference source if the onboard reference circuit is not desired. The external voltage reference should not exceed the applied power supply, VDD, of the DAC under test. The RE ...
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... were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions ...
... were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions ...
LT3651-4.1, 4.2 - Linear Technology
... the bad battery fault that is generated if the battery does not reach the precondition threshold voltage within one-eighth of a full cycle (22.5 minutes for a 3 hour charge cycle). The timer based termination is disabled by connecting the TIMER pin to ground. With the timer function disabled, chargi ...
... the bad battery fault that is generated if the battery does not reach the precondition threshold voltage within one-eighth of a full cycle (22.5 minutes for a 3 hour charge cycle). The timer based termination is disabled by connecting the TIMER pin to ground. With the timer function disabled, chargi ...
VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT, FULLY DIFFERENTIAL AMPLIFIER THS4521 THS4522
... These fully differential op amps feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between ...
... These fully differential op amps feature accurate output common-mode control that allows for dc-coupling when driving analog-to-digital converters (ADCs). This control, coupled with an input common-mode range below the negative rail as well as rail-to-rail output, allows for easy interfacing between ...
ADP5040 Micro PMU with 1.2 A Buck Regulator and Two 300 mA
... Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to ab ...
... Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to ab ...
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... The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the ‘‘1’’ and ‘‘2’’ in the pin description. A HIGH level on the nMR input overrides the clock and sets the outputs LOW. ...
... The master resets are active-HIGH asynchronous inputs to each 4-bit counter identified by the ‘‘1’’ and ‘‘2’’ in the pin description. A HIGH level on the nMR input overrides the clock and sets the outputs LOW. ...
AD8350 数据手册DataSheet 下载
... the differential output voltages. This will cause an increase in the second order harmonic distortion (at 50 MHz, with VCC = 10 V and VOUT = 1 V p-p, –59 dBc was measured for the second harmonic on AD8350-15). ...
... the differential output voltages. This will cause an increase in the second order harmonic distortion (at 50 MHz, with VCC = 10 V and VOUT = 1 V p-p, –59 dBc was measured for the second harmonic on AD8350-15). ...
Bipolar Junction Transistor Characterization
... The DC forward current gain of the BJT is denoted by F and is the ratio of the collector to base currents: F = IC/IB. This is perhaps the single most important parameter for characterization of the BJT. F depends upon many factors and can be measured at many different points on the characteristic ...
... The DC forward current gain of the BJT is denoted by F and is the ratio of the collector to base currents: F = IC/IB. This is perhaps the single most important parameter for characterization of the BJT. F depends upon many factors and can be measured at many different points on the characteristic ...
74VCX16373 Low Voltage 16-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs 7
... each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the Latch Enable (LEn) input is HIGH, data on the In enters the latches. In this condition the latches are trans ...
... each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the Latch Enable (LEn) input is HIGH, data on the In enters the latches. In this condition the latches are trans ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.