LTC3701 - 2-Phase, Low Input Voltage, Dual Step
... 180 degrees out of phase. During normal operation, each external P-channel power MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is controlled by the ...
... 180 degrees out of phase. During normal operation, each external P-channel power MOSFET is turned on when the clock for that channel sets the RS latch, and turned off when the current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is controlled by the ...
MAX1864/MAX1865 xDSL/Cable Modem Triple/Quintuple Output Power Supplies General Description
... the MAX1864 generates three positive outputs, and the MAX1865 generates four positive outputs and one negative output to provide a cost-effective system power supply. The MAX1864 includes a current-mode synchronous step-down controller and two positive regulator gain blocks. The MAX1865 has one addi ...
... the MAX1864 generates three positive outputs, and the MAX1865 generates four positive outputs and one negative output to provide a cost-effective system power supply. The MAX1864 includes a current-mode synchronous step-down controller and two positive regulator gain blocks. The MAX1865 has one addi ...
Power Integrations
... encountered input voltage ranges: 85 to 132 VAC for 100/115 VAC, 195 to 265 VAC for 230 VAC and 85 to 265 VAC for universal input. A ±15% line voltage variation is assumed in all cases. Applications with a different input voltage range can be handled by following the information and methods provided ...
... encountered input voltage ranges: 85 to 132 VAC for 100/115 VAC, 195 to 265 VAC for 230 VAC and 85 to 265 VAC for universal input. A ±15% line voltage variation is assumed in all cases. Applications with a different input voltage range can be handled by following the information and methods provided ...
XR-2206 - TU Berlin
... respectively, as shown in Figure 13. Depending on the polarity of the logic signal at Pin 9, either one or the other of these timing resistors is activated. If Pin 9 is open-circuited or connected to a bias voltage 2V, only R1 is activated. Similarly, if the voltage level at Pin 9 is 1V, only R2 ...
... respectively, as shown in Figure 13. Depending on the polarity of the logic signal at Pin 9, either one or the other of these timing resistors is activated. If Pin 9 is open-circuited or connected to a bias voltage 2V, only R1 is activated. Similarly, if the voltage level at Pin 9 is 1V, only R2 ...
AN4130
... due to input voltage ripple, spreads noise over a wide spectrum, reducing the noise at any one frequency. Conducted EMI tests can be easier to pass. ...
... due to input voltage ripple, spreads noise over a wide spectrum, reducing the noise at any one frequency. Conducted EMI tests can be easier to pass. ...
FAN3240 / FAN3241 Smart Dual-Coil Relay Drivers FAN3240 / FAN32
... Figure 17. Simplified Diagram of a Relay Drive As Figure 17 shows, a dual-coil relay is connected to its supply rail at the center point of the two relay windings. Each winding can be energized by the switches connected to the relay coils. The two switches must not be on at the same time because tha ...
... Figure 17. Simplified Diagram of a Relay Drive As Figure 17 shows, a dual-coil relay is connected to its supply rail at the center point of the two relay windings. Each winding can be energized by the switches connected to the relay coils. The two switches must not be on at the same time because tha ...
CE31533536
... Thus voltages are built up across the line insulation. If these voltages equal or exceed the line critical flashover voltage (CFO), flashover occurs. Study on back flashover is very important to evaluate lightning performance as majority of lightning strokes terminate on shield wire than phase condu ...
... Thus voltages are built up across the line insulation. If these voltages equal or exceed the line critical flashover voltage (CFO), flashover occurs. Study on back flashover is very important to evaluate lightning performance as majority of lightning strokes terminate on shield wire than phase condu ...
LF155/LF156/LF256 LF257 LF355 LF356
... The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5 μV/°C typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open-loop voltage gain are also unaffected by offset adjustment. The input bias currents are junc ...
... The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5 μV/°C typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open-loop voltage gain are also unaffected by offset adjustment. The input bias currents are junc ...
CD35455460
... harmonic content of the output voltage waveform decreases significantly. It is well known that multilevel inverters are suitable in high voltage and high power applications due to their ability to synthesize waveforms with better harmonic spectrum and attains higher voltages with limited maximum dev ...
... harmonic content of the output voltage waveform decreases significantly. It is well known that multilevel inverters are suitable in high voltage and high power applications due to their ability to synthesize waveforms with better harmonic spectrum and attains higher voltages with limited maximum dev ...
LTC6103 - Dual High Voltage, High Side Current Sense Amplifier
... must first be considered. If the circuit following is a buffer or ADC with limited input range, then ROUT must be chosen so that IOUT(MAX) • ROUT is less than the allowed maximum input range of this circuit. ...
... must first be considered. If the circuit following is a buffer or ADC with limited input range, then ROUT must be chosen so that IOUT(MAX) • ROUT is less than the allowed maximum input range of this circuit. ...
ICS9248-81 - Integrated Device Technology
... header may be used. These figures illustrate the optimal PCB physical layout options. These configuration resistors are of such a large ohmic value that they do not effect the low impedance clock signals. The layouts have been optimized to provide as little impedance transition to the clock signal a ...
... header may be used. These figures illustrate the optimal PCB physical layout options. These configuration resistors are of such a large ohmic value that they do not effect the low impedance clock signals. The layouts have been optimized to provide as little impedance transition to the clock signal a ...
AD7667 数据手册DataSheet下载
... The AD7667* is a 16-bit, 1 MSPS, charge redistribution SAR analog-to-digital converter that operates from a single 5 V power supply. The part contains a high speed 16-bit sampling ADC, an internal conversion clock, internal reference, error correction circuits, and both serial and parallel system in ...
... The AD7667* is a 16-bit, 1 MSPS, charge redistribution SAR analog-to-digital converter that operates from a single 5 V power supply. The part contains a high speed 16-bit sampling ADC, an internal conversion clock, internal reference, error correction circuits, and both serial and parallel system in ...
MAX1115/MAX1116 Single-Supply, Low-Power, Serial 8-Bit ADCs General Description Features
... a conversion completes, which results in a supply current of <1µA (see Shutdown Current vs. Supply Voltage plot in the Typical Operating Characteristics section). The digital conversion result is maintained in a static register and is available for access through the serial interface at any time. ...
... a conversion completes, which results in a supply current of <1µA (see Shutdown Current vs. Supply Voltage plot in the Typical Operating Characteristics section). The digital conversion result is maintained in a static register and is available for access through the serial interface at any time. ...
MAX2654-56 - Maxim Integrated
... Note 3: Maximum DC voltage through a 10kΩ resistor that sets the MAX2654/MAX2655 to operate in shutdown mode and MAX2656 in high-gain mode. Note 4: DC current required when VRFOUT is connected to VCC through a 10kΩ resistor. Note 5: DC current required when VRFOUT is connected to GND through a 10kΩ ...
... Note 3: Maximum DC voltage through a 10kΩ resistor that sets the MAX2654/MAX2655 to operate in shutdown mode and MAX2656 in high-gain mode. Note 4: DC current required when VRFOUT is connected to VCC through a 10kΩ resistor. Note 5: DC current required when VRFOUT is connected to GND through a 10kΩ ...
TPS6030x EVM-170 Single-Cell Charge Pump
... to TPS60303 charge pump devices helps designers evaluate these devices. With these EVMs it is possible to evaluate all different modes of the devices as well as their performance. Only a dc voltage source is needed to operate the EVM. The layout of the charge pump circuit is critical and is similar ...
... to TPS60303 charge pump devices helps designers evaluate these devices. With these EVMs it is possible to evaluate all different modes of the devices as well as their performance. Only a dc voltage source is needed to operate the EVM. The layout of the charge pump circuit is critical and is similar ...
AD7663 数据手册DataSheet下载
... When SER/PAR is HIGH, EXT/INT is LOW and RDC/SDIN is LOW, which is the Serial Master Read after Convert Mode. These inputs, part of the Serial Port, are used to slow down, if desired, the internal serial clock that clocks the data output. In the other serial modes, these pins are high impedance outp ...
... When SER/PAR is HIGH, EXT/INT is LOW and RDC/SDIN is LOW, which is the Serial Master Read after Convert Mode. These inputs, part of the Serial Port, are used to slow down, if desired, the internal serial clock that clocks the data output. In the other serial modes, these pins are high impedance outp ...
AM512B - angular magnetic encoder IC
... the Data pin to the controller. At each subsequent low/high transition of Clock the next bit is transmitted to the controller. While reading the data the tCHI and tCLO must be less than tmMin to keep the monoflop set. After the least significant bit (LSB) is output (point 3) the Data goes to low. Th ...
... the Data pin to the controller. At each subsequent low/high transition of Clock the next bit is transmitted to the controller. While reading the data the tCHI and tCLO must be less than tmMin to keep the monoflop set. After the least significant bit (LSB) is output (point 3) the Data goes to low. Th ...
Chapter_5 - UniMAP Portal
... connected such that they provide a single path between two points. Short A circuit condition in which there is zero or an abnormally low resistance between two points; usually an inadvertent condition. Voltage divider A circuit consisting of series resistors across which one or more output voltages ...
... connected such that they provide a single path between two points. Short A circuit condition in which there is zero or an abnormally low resistance between two points; usually an inadvertent condition. Voltage divider A circuit consisting of series resistors across which one or more output voltages ...
Precision Voltage Regulators
... absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Peak voltage from VCC+ to VCC– (tw ≤ 50 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Continuous voltage from VCC+ to VCC– . . . . . . . . . . . . ...
... absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Peak voltage from VCC+ to VCC– (tw ≤ 50 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V Continuous voltage from VCC+ to VCC– . . . . . . . . . . . . ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.