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... external power amplifier, as shown in Fig. 3.2. ...
... external power amplifier, as shown in Fig. 3.2. ...
lec6
... Constant Current Input In the circuit of Fig. 6.9 a current source is is switched to a parallel linear time invariant RC circuit. For simplicity we consider first the case when the current is is constant and equal to I. Prior to the opening of the switch the current source produces a circulating cur ...
... Constant Current Input In the circuit of Fig. 6.9 a current source is is switched to a parallel linear time invariant RC circuit. For simplicity we consider first the case when the current is is constant and equal to I. Prior to the opening of the switch the current source produces a circulating cur ...
AN2950
... The power supply is set-up in a flyback topology. Its schematic is shown in Figure 2. The input section includes the protection elements (fuse and NTC for inrush current limiting), a filter for EMC suppression (C1, T2, C13), a diode bridge (BR1) and an electrolytic bulk capacitor (C3) as the front-e ...
... The power supply is set-up in a flyback topology. Its schematic is shown in Figure 2. The input section includes the protection elements (fuse and NTC for inrush current limiting), a filter for EMC suppression (C1, T2, C13), a diode bridge (BR1) and an electrolytic bulk capacitor (C3) as the front-e ...
SN65LVCP204 数据资料 dataSheet 下载
... at a premium. Transmit preemphasis and receive equalization are built in for superior signal integrity performance. ...
... at a premium. Transmit preemphasis and receive equalization are built in for superior signal integrity performance. ...
High-Efficiency, 3A, Current-Mode Synchronous, Step-Down Switching Regulator MAX15058 General Description Features
... regulator can deliver up to 3A of output current. The MAX15058 provides output voltages from 0.6V to 0.94 x VIN from 2.7V to 5.5V input supplies, making the device ideal for on-board point-of-load applications. The MAX15058 delivers current-mode control architecture using a high-gain transconductanc ...
... regulator can deliver up to 3A of output current. The MAX15058 provides output voltages from 0.6V to 0.94 x VIN from 2.7V to 5.5V input supplies, making the device ideal for on-board point-of-load applications. The MAX15058 delivers current-mode control architecture using a high-gain transconductanc ...
MAX9157 Quad Bus LVDS Transceiver General Description Features
... voltage transition time = 1ns (20% to 80%). Input common-mode voltage VCM = 1.2V to 1.8V, DE_ = high, RE_ = low, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, and TA = +25°C.) (Notes 3 and 5) ...
... voltage transition time = 1ns (20% to 80%). Input common-mode voltage VCM = 1.2V to 1.8V, DE_ = high, RE_ = low, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, |VID| = 0.2V, VCM = 1.2V, and TA = +25°C.) (Notes 3 and 5) ...
FT7511 Reset Timer with Fixed Delay and Reset Pulse
... is held LOW for tREC, 80ms, as soon as the reset time of 7.5s is met, regardless of the state of the /SR0 pin. When the /SR0 input has returned HIGH and tREC has expired, the internal timer resets and awaits the next RESET event. ...
... is held LOW for tREC, 80ms, as soon as the reset time of 7.5s is met, regardless of the state of the /SR0 pin. When the /SR0 input has returned HIGH and tREC has expired, the internal timer resets and awaits the next RESET event. ...
Design of a Restartable Clock Generator for Use in GALS SoCs
... ring oscillator. Pausible clocks are often discussed in the relevant literature; for example, in [Tra:91], [Dob:99], [Ami:07], [Yun:99], [Gür:06], and [Bei:08]. In the scheme proposed in this research, the clock generator is based on a stable crystal oscillator, yet functions like a delay-based cloc ...
... ring oscillator. Pausible clocks are often discussed in the relevant literature; for example, in [Tra:91], [Dob:99], [Ami:07], [Yun:99], [Gür:06], and [Bei:08]. In the scheme proposed in this research, the clock generator is based on a stable crystal oscillator, yet functions like a delay-based cloc ...
ADM3202 数据手册DataSheet 下载
... The ADM3202/ADM3222 feature high slew rates permitting data transmission at rates well in excess of the EIA/RS-232E specifications. RS-232 voltage levels are maintained at data rates up to 460 kbps even under worst-case loading conditions. This allows high speed data links between two terminals and ...
... The ADM3202/ADM3222 feature high slew rates permitting data transmission at rates well in excess of the EIA/RS-232E specifications. RS-232 voltage levels are maintained at data rates up to 460 kbps even under worst-case loading conditions. This allows high speed data links between two terminals and ...
S270-20-3 (Discontinued)
... device used in conjunction with source-side protective devices such as reclosers or circuit breakers, to automatically isolate faulted sections of electrical distribution systems. The sectionalizer senses current flow above a preset level, and, when the source-side protective device opens to de-ener ...
... device used in conjunction with source-side protective devices such as reclosers or circuit breakers, to automatically isolate faulted sections of electrical distribution systems. The sectionalizer senses current flow above a preset level, and, when the source-side protective device opens to de-ener ...
MAX9234/MAX9236/ MAX9238 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers
... Data coding by the MAX9209/MAX9211/MAX9213/ MAX9215 serializers (which are companion devices to the MAX9234/MAX9236/MAX9238 deserializers) limits the imbalance of ones and zeros transmitted on each channel. If +1 is assigned to each binary 1 transmitted and -1 is assigned to each binary 0 transmitte ...
... Data coding by the MAX9209/MAX9211/MAX9213/ MAX9215 serializers (which are companion devices to the MAX9234/MAX9236/MAX9238 deserializers) limits the imbalance of ones and zeros transmitted on each channel. If +1 is assigned to each binary 1 transmitted and -1 is assigned to each binary 0 transmitte ...
R u t c o r Research Metric and ultrametric spaces
... well-defined and for every three nodes a, b, c the inequality µa,b ≤ µa,c + µc,b holds. It obviously implies the standard triangle inequality µa,b ≤ µa,c + µc,b when s ≥ r. For the case s = r = 1, these results were rediscovered in 1990s. Now, in 23 years, I venture to reproduce the proof of the ori ...
... well-defined and for every three nodes a, b, c the inequality µa,b ≤ µa,c + µc,b holds. It obviously implies the standard triangle inequality µa,b ≤ µa,c + µc,b when s ≥ r. For the case s = r = 1, these results were rediscovered in 1990s. Now, in 23 years, I venture to reproduce the proof of the ori ...
