$doc.title
... 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated condition ...
... 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated condition ...
GE Energy 20A Digital MicroDLynx : Non-Isolated DC-DC Power Modules Data Sheet
... These modules operate over a wide range of input voltage (VIN = 3Vdc-14.4Vdc) and provide a precisely regulated output voltage from 0.6Vdc to 5.5Vdc, programmable via an external resistor and PMBusTM control. Features include a digital interface using the PMBusTM protocol, remote On/Off, adjustable ...
... These modules operate over a wide range of input voltage (VIN = 3Vdc-14.4Vdc) and provide a precisely regulated output voltage from 0.6Vdc to 5.5Vdc, programmable via an external resistor and PMBusTM control. Features include a digital interface using the PMBusTM protocol, remote On/Off, adjustable ...
74ALVT162823 1. General description 18-bit bus-interface D-type flip-flop with reset and enable with
... For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. ...
... For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. ...
WT300 Series THE 5TH GENERATION OF THE WORLD'S BEST SELLING POWER METER
... The solution enables testing to be performed according to the IEC62301 Ed1.0 and Ed2.0 standards which specify the use of special algorithms for determining the power stability in the device under test. The software thus gathers all the required measurement data from the WT310, which includes not on ...
... The solution enables testing to be performed according to the IEC62301 Ed1.0 and Ed2.0 standards which specify the use of special algorithms for determining the power stability in the device under test. The software thus gathers all the required measurement data from the WT310, which includes not on ...
wt300 series digital power meter
... The solution enables testing to be performed according to the IEC62301 Ed1.0 and Ed2.0 standards which specify the use of special algorithms for determining the power stability in the device under test. The software thus gathers all the required measurement data from the WT310, which includes not on ...
... The solution enables testing to be performed according to the IEC62301 Ed1.0 and Ed2.0 standards which specify the use of special algorithms for determining the power stability in the device under test. The software thus gathers all the required measurement data from the WT310, which includes not on ...
UCC28510 数据资料 dataSheet 下载
... Based on the average current mode control architecture with input voltage feedforward of prior PFC/PWM combination controllers, these devices offer performance advantages. Two new key PWM features are programmable maximum duty cycle and the 2x PWM frequency options to the base PFC frequency. For the ...
... Based on the average current mode control architecture with input voltage feedforward of prior PFC/PWM combination controllers, these devices offer performance advantages. Two new key PWM features are programmable maximum duty cycle and the 2x PWM frequency options to the base PFC frequency. For the ...
AppNote07Flcphy2PinOut
... Linearity measurement – Cf=3pF .......................................................................................... 25 Linearity measurement – Cf=1.6pF ....................................................................................... 26 Linearity measurement – Cf=0.8pF .................. ...
... Linearity measurement – Cf=3pF .......................................................................................... 25 Linearity measurement – Cf=1.6pF ....................................................................................... 26 Linearity measurement – Cf=0.8pF .................. ...
The Comparison of the Input Impedance
... insertion loss (IL) method. Two methods to measure the input impedance use the same equipments: the spectrum analyzer and the current probe.The input impedance of SMPS measurement setup is shown in Fig. 1. Schneider [1] proposed the resonance method to measure the input impedance. This method assume ...
... insertion loss (IL) method. Two methods to measure the input impedance use the same equipments: the spectrum analyzer and the current probe.The input impedance of SMPS measurement setup is shown in Fig. 1. Schneider [1] proposed the resonance method to measure the input impedance. This method assume ...
A Typical DC Voltage Calibration Sequence
... Flatness is a measure of the deviation from an assumed flat reference level. ...
... Flatness is a measure of the deviation from an assumed flat reference level. ...
IL3285, IL3222 - NVE Corporation
... The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VDD1, VDD2 = 5 V or VDD1= 3.3 V and TA = 25°C. While −7 V < VCM < 12 V, the minimum VOD2 with a 54 Ω load is either ½ VOD1 or 1.5 V, ...
... The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VDD1, VDD2 = 5 V or VDD1= 3.3 V and TA = 25°C. While −7 V < VCM < 12 V, the minimum VOD2 with a 54 Ω load is either ½ VOD1 or 1.5 V, ...
pdf
... ratio of the rate of detection pulses to the rate of incident photons. When the device is biased above its avalanche current, the measured detection efficiency is independent to the incident photon flux, since a single photon absorption can produce a full avalanche. Thus, from measuring DDE versus t ...
... ratio of the rate of detection pulses to the rate of incident photons. When the device is biased above its avalanche current, the measured detection efficiency is independent to the incident photon flux, since a single photon absorption can produce a full avalanche. Thus, from measuring DDE versus t ...
BDTIC www.BDTIC.com/infineon Combi PFC/ PWM Controller ICE1CS02
... The minimal line current gaps for the maximum duty cycle of the PFC is about 95%. The selectable maximum duty of the PWM, however, is limited to 47% or 60% to prevent transformer saturation. The external RC-filter in the feedback line after the optocoupler is integrated into the IC in order to reduc ...
... The minimal line current gaps for the maximum duty cycle of the PFC is about 95%. The selectable maximum duty of the PWM, however, is limited to 47% or 60% to prevent transformer saturation. The external RC-filter in the feedback line after the optocoupler is integrated into the IC in order to reduc ...
Pinball Transistor Testing - Testing transistors used in pinball
... Emitter = The base emits electrons to the emitter. There are two paths for current to flow in a transistor, one part for each junction. There is a base-collector path and a base-emitter path. The schematic symbol for a NPN transistor is shown below with its labels. ...
... Emitter = The base emits electrons to the emitter. There are two paths for current to flow in a transistor, one part for each junction. There is a base-collector path and a base-emitter path. The schematic symbol for a NPN transistor is shown below with its labels. ...
1.8 V, 6 LVDS/12 CMOS Outputs Low Power Clock Fanout Buffer ADCLK846
... Complementary Side of Differential LVDS Output 5, or CMOS Output 5 on Channel B. True Side of Differential LVDS Output 5, or CMOS Output 5 on Channel A. Complementary Side of Differential LVDS Output 4, or CMOS Output 4 on Channel B. True Side of Differential LVDS Output 4, or CMOS Output 4 on Chann ...
... Complementary Side of Differential LVDS Output 5, or CMOS Output 5 on Channel B. True Side of Differential LVDS Output 5, or CMOS Output 5 on Channel A. Complementary Side of Differential LVDS Output 4, or CMOS Output 4 on Channel B. True Side of Differential LVDS Output 4, or CMOS Output 4 on Chann ...
MAX3798 1.0625Gbps to 10.32Gbps, Integrated, Low- General Description
... and VCSEL driver designed for 1x/2x/4x/8x Fibre Channel transmission systems at data rates up to 8.5Gbps as well as for 10GBASE-SR transmission systems at a data rate of 10.3125Gbps. Operating from a single +3.3V supply, this low-power integrated limiting amplifier and VCSEL driver IC enables a plat ...
... and VCSEL driver designed for 1x/2x/4x/8x Fibre Channel transmission systems at data rates up to 8.5Gbps as well as for 10GBASE-SR transmission systems at a data rate of 10.3125Gbps. Operating from a single +3.3V supply, this low-power integrated limiting amplifier and VCSEL driver IC enables a plat ...
MAX19692 12-Bit, 2.3Gsps, Multi-Nyquist DAC with Selectable Frequency Response General Description
... (DAC) enables direct digital synthesis of high-frequency and wideband signals in baseband and higher Nyquist zones. It has been optimized for wideband communications and radar applications. It has excellent spurious and noise performance and can be used for synthesis of wideband signals in the frequ ...
... (DAC) enables direct digital synthesis of high-frequency and wideband signals in baseband and higher Nyquist zones. It has been optimized for wideband communications and radar applications. It has excellent spurious and noise performance and can be used for synthesis of wideband signals in the frequ ...
Wilson current mirror
A Wilson current mirror is a three-terminal circuit (Fig. 1) that accepts an input current at the input terminal and provides a ""mirrored"" current source or sink output at the output terminal. The mirrored current is a precise copy of the input current. It may be used as a Wilson current source by applying a constant bias current to the input branch as in Fig. 2. The circuit is named after George R. Wilson, an integrated circuit design engineer who worked for Tektronix. Wilson devised this configuration in 1967 when he and Barrie Gilbert challenged each other to find an improved current mirror overnight that would use only three transistors. Wilson won the challenge.