A Substrate Modeling Methodology
A Study of the Material Best Suited to Replace
A Step in the Evolution of Integrated Circuit Technology
A single ended 6T SRAM cell design for ultra-low
A Simple Drain Current Model for MOS Transistors with the Lorentz
A Simple and Unambiguous Definition of Threshold Voltage and Its
A Self-aligned Gate Definition Process with Submicron Gaps
A selection of research topics in semiconductor physics at the Cavendish Laboratories
A Secure Dynamically Programmable Gate Array Based on
A Scalable, Timing-Safe, Network-on-Chip Architecture
A Rapid Power-Switchable Track-and-Hold Amplifier in 90
A programmable pulse generator for in
A process request form can be downloaded here.
A Power-Gating Scheme for MOS Current Mode Logic Circuits
A Power-Efficient High-Throughput 32
A Physics-Based InP/InGaAs SHBT Model for SPICE simulation
A Novel Technique for 3-D Integration: Ge
A Novel Selected Area Laser Assisted (SALA) System
A novel optimization design for 3.3 kV injection
A Novel Current-Mode Alternative Topology for Oscillator
