A 6-to-18 GHz Tunable Concurrent Dual-Band Receiver Front End
A 6-to-18 GHz Tunable Concurrent Dual-Band Receiver
A 6-bit, 500-MS/s current-steering DAC in SiGe BiCMOS technology
A 5mA 0.6µm CMOS Miller-Compensated LDO Regulator with
A 56-GHz LC-Tank VCO With 17% Tuning Range in 65
A 52 Amplifier2.qxp
A 52 Amplifier2.qxp
a 500-nanosecond main computer memory utilizing plated
a 50 MHz CMOS Complete DDS AD9835
A 5.9-GHz Voltage-Controlled Ring Oscillator in 0.18
A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems
A 5-bit 5 Gs/s flash ADC using multiplexer-based
A 5-20 GHz 5-Bit True Time Delay Circuit in 0.18 µm CMOS
A 4Gb/s/ch 356fJ/b 10mm equalized on-chip
A 45nm CMOS Neuromorphic Chip with a Scalable Architecture for
A 410-GHz CMOS push-push oscillator with an on
A 41 SERIES Low profile PCB relays 8 - 12 - 16 A
A 40Gb/s Clock and Data Recovery Circuit in 0.18um
A 40Gb/s clock and data recovery circuit in 0.18/spl mu/m CMOS
A 4000 A 5000
