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COLORADO STATE UNIVERSITY
ECE 332: ELECTRONIC PRINCIPLES II
HOMEWORK 4
1. An NMOS transistor fabricated in a certain process is found to have an intrinsic gain of 80V/V
when operated at an 𝐼𝐷 = 100 𝜇𝐴. (The intrinsic gain of a transistor is its own gm times its own
output impedance). Find the intrinsic gain for 𝐼𝐷 = 25𝜇𝐴 and 𝐼𝐷 = 400𝜇𝐴. For each of these
currents, find the factor by which 𝑔𝑚 changes from its value at 𝐼𝐷 = 100𝜇𝐴.
2. Sketch the circuit for a current-source-loaded CS amplifier that uses a PMOS transistor for
the amplifying device. Assume the availability of a single +1.8V DC supply. If the transistor is
operated with |𝑉𝑠𝑎𝑡 | = 0.3V, what is the highest instantaneous voltage allowed at the drain?
3. The figure below shows a MOS amplifier formed by cascading two common source stages.
Assuming that 𝑉𝐴𝑛 = |𝑉𝐴𝑝 | and that the biasing current sources have output resistances equal
to those of 𝑄1 and 𝑄2 , find an expression for the overall voltage gain in term of 𝑔𝑚 and 𝑟𝑜 of
𝑄1 and 𝑄2 .
4. Consider the CMOS amplifier shown in the figure below when fabricated with a process for
which 𝑘 ′ 𝑛 = 2.5𝑘 ′ 𝑝 , 𝑎𝑛𝑑 𝑘 ′ 𝑛 = 250𝜇𝐴/𝑉 2, |𝑉𝑡 | = 0.6𝑉 and |𝑉𝐴 | = 10𝑉 for both pfet and nfet.
Find 𝐼𝑅𝐸𝐹 and (𝑊/𝐿)1 to obtain a voltage gain of -40 V/V and an output resistance of 100 𝑘Ω.
If 𝑄2 and 𝑄3 are to be operated at the same overdrive voltage as 𝑄1 , what must their 𝑊/𝐿
ratios be?
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