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Analog Electronics
Crash course part 1
Bertil Larsson
Electro- and Information Technology
Layout
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Feedback using the nullor (e.g. ideal amplifier)
Transistor (bipolar and FET)
Liniarization of the transistor (small signal model)
Implementation (one, two or three amplifying
stages)
Asymptotic gain model
2
Fundamentals
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Why use feedback?
Why do we want negative feedback?
3
Nullor circuits
4
Output
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Load voltage is measured in parallel with the load
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”shunt”-measure
Load current is measured in series with the load
Feedback
V
Feedback
I
5
Input
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Voltage is added in series to the source signal
Current is added in parallel to the source signal
Feedback
Feedback
6
Amplifying elements
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BJT
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FET
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Both have a non linear relation between input and
output signal
7
Graphs for BJT
8
Implementation
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Transimpedance amplifier
Nullor
CE-stage
9
Bias is necessary
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For small xi
g( xi )
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Note
xI
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Total
A xi
xi

XI
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Signal
Bias
10
Transistor models
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Large signal model
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Non linear equations
Bias point
Sets the linear model
Small signal model
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Q
g m , r , ro
Linear equations
Loop gain
11
2 minuter
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Suppose you know IC for a BJT
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What is gm?
What is r ?
12
Superposition model
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Relation of load and source signal
Qi
Qg
QL
At 0Qg
Qc
At
Qc
Qc
AQi
QL
Qg
At 0
A
1 A
Loop gain
13
How to calculate At
At
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1
A
1 A
1 A
At 0
1 A
A
At
1 A
1
At 0
1 A
Discrepancy factor
Neglect
At∞ is set by the nullor circuit
At
A
At
1 A
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Calculate loopgain A
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Identify the ”natural” A and
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Feedback
v1
ic2 v
s 0
Controlled sources gain
A
ic2
v1
15
Amplifying stages
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CE-steg
AS-steg
CC-steg
CB-steg
Series-stage
Shunt-stage
negative transfer
neg./pos. transfer
positive transfer
positive transfer
negative transfer
negative transfer
no feedback
no feedback
feedback
feedback
feedback
feedback
16
2 minuter
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Identify amplifying stages for the current amplifier
and name them
Check for negative feedback
17
Antiseries stage
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Small-signal model for the AS-stage is very
similar to the hybrid- -model for CE-stage
No connection between in- and output
Parameters of the model
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Transconductance gm´
Input impedance r ´
Output impedance ro´
In this cource we neglect ro´ if nothing else is
stated!
18
Time to get going
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You are to design a 2-stage V
I amplifier
Which stages do you choose? Motivate!
Theoretical, what is the maximum loop gain?
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Assume you have BJT transistors at hand
Which bias current influence A ?
19