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```AD5560
Data Sheet
Table 21. Compensation Register 2
0x5
Default
0x0110
Bit
15
Name
Manual
compensation
14
13
12
RZ[2:0]
11
10
9
RP[2:0]
8
7
gm[1:0]
Data Bits, MSB First
Function
The AD5560 can be manually configured to compensate the force amplifier into a wide range of load
conditions. When this bit is high, manual compensation mode is active, and it overrides the settings of
Compensation Register 1. Readback when in manual compensation mode returns the compensation
settings loaded to the force amplifier and loaded to this register. Similarly, when in autocompensation
mode, readback of this register address returns the compensation settings of the force amplifier. However,
readback of this register address when in safe mode does not reflect SAFEMODE settings. SAFEMODE
settings are gm[1:0] = 2, RP[2:0] = 0, RZ[2:0] = 0, CC[3:1] = 111, CF[2:0] = 5, and CC0 = 1.
Set the value of RZ to add a zero at the following frequencies. This calculation assumes that CC0 = 100 pF.
RZ
FZ (Hz)
01
500
3.2 M
1
1.6 k
1M
2
5k
320 k
3
16 k
100 k
4
50 k
32 k
5
160 k
10 k
6
500 k
3.2 k
7
1.6 M
1k
Set the value of RP to add an additional pole. There is an internal 8 pF capacitor to provide an RC filter,
creating a pole at one of the following frequencies.
RP[2:0]
FP (Hz)
200
100 M
01
1
675
29 M
2
2280
8.7 M
3
7700
2.6 M
4
26 k
760 k
5
88 k
220 k
6
296 k
67 k
7
1M
20 k
Set the transconductance of the force amplifiers input stage. The gain bandwidth (GBW) of the force
voltage loop is equal to gmx/CC0. The following values assume CC0 = 100 pF.
gmx
gmx (ÂµA/V)
GBW (Hz)
0
40
64 k
1
80
130 k
300
480 k (default)
900
1.3 M
1
2
3
6
5
4
CF[2:0]
These bits determine which feedforward capacitor CFx is switched in.
CFx
0
1
2
3
4
Action
None
CF0
CF1
CF2
CF3
CF4
51
6
7
1
None
None
3
CC3
Connect CC3 in series with 100 kÎ©1
2
CC2
Connect CC2 in series with 25 kÎ©1
1
CC1
0
Reserved
Connect CC1 in series with 6 kÎ©1
0
This item corresponds to a SAFEMODE setting (SAFEMODE is the power-on default setting).
Rev. D | Page 50 of 68
```
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